Address Generation Circuitry of WiMAX Deinterleaver using Xilinx FPGA
نویسنده
چکیده
The paper reports the implementation of address generator of the 2-D deinterleaver used in wimax transreceiver system using FPGA. The bit streams in channel interleaver and deinterleaver for IEEE 802.16e standard associated with floor function is very difficult to implement on the FPGA kit. But by using this proposed algorithm eliminates the requirement of floor function and it also reduces the complexity in the FPGA implementation. In this paper presents a novel and highly efficient Quadrature Phase Shift Keying(QPSK), 16-QAM, 64QAM sharing resources and these are novel and highly efficient compared with conventional Look-Up-Table (LUT)
منابع مشابه
Efficient Implementation of FPGA to Generate the Address for Various Code Rates/Modulation Scheme of Wimax Deinterleaver without Manual Computation
The main aim of this paper is to reduce floor function concept which is very difficult to implement Field Programmable Gate Array (FPGA) associated with the standards of IEEE 802.16.So instead we use a simple mathematical steps of algorithm in order to generate an address for WiMAX Deinterleaver so that low power and novel technique is obtained using Xilinx Field Programmable Gate Array (FPGA)....
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